Glossary
JTAG
The IEEE 1149.1 test access port used for boundary-scan testing and, in practice, for low-level debugging and programming of processors.
JTAG, named after the Joint Test Action Group, is standardized as IEEE 1149.1. It defines a test access port with signals TCK, TMS, TDI, TDO and optional TRST, originally for testing solder joints through boundary scan. Chip vendors extended it for debugging: halting a CPU, reading memory and registers, and programming flash.
Arm's Serial Wire Debug (SWD) provides similar debug access over two wires. Leaving JTAG or SWD enabled on production devices is a common security finding; mitigations include debug-disable fuses, readout protection and authenticated debug.